integrasi max2548 pada radio

Description

The MAX2548 quad-band direct-conversion RF-to-bits radio receiver is designed for 1x (3.84Mcps) and 2x (7.68Mcps) TDD-WCDMA applications. The part supports operation in the 915MHz to 921MHz, 1900MHz to 1920MHz, 2010MHz to 2025MHz, and 2050MHz to 2082MHz frequency bands.

The unique RF-to-bits architecture of the MAX2548 integrates 4 LNAs, quadrature mixers, baseband anti-aliasing filters, programmable gain baseband amplifiers, high dynamic range I and Q sigma-delta analog-to-digital converters (ADCs), a fractional-N frequency synthesizer for local oscillator (LO) generation, and a fractional-N frequency synthesizer for sampling clock generation. Data is transferred from the radio to the baseband/DSP by a digital 1-bit sigma-delta modulated I and Q bit-stream through an LVDS-like interface. All decimation, compensation, and channel filtering is performed in the digital domain in compliance with the MAX-PHY digital section definition. The operating mode of the radio is fully programmable by a 3-wire serial interface. 

Deskripsi The MAX2548 quad-band langsung konversi RF-to-bit penerima radio dirancang untuk 1x (3.84Mcps) dan 2x (7.68Mcps) aplikasi TDD-WCDMA. Bagian mendukung operasi di 915MHz untuk 921MHz, 1900MHz untuk 1920MHz, 2010MHz untuk 2025MHz, dan 2050MHz untuk pita frekuensi 2082MHz. Arsitektur RF-to-bit yang unik dari MAX2548 yang mengintegrasikan 4 LNAs, mixer quadrature, baseband anti-aliasing filter, diprogram amplifier gain baseband, kisaran dinamis tinggi I dan Q analog-ke-digital converter sigma-delta (ADC), pecahan N synthesizer frekuensi untuk osilator lokal (LO) generasi, dan pecahan-N frekuensi synthesizer untuk sampling generasi jam. Data ditransfer dari radio ke baseband / DSP oleh 1-bit sigma-delta modulasi digital I dan Q bit-stream melalui antarmuka LVDS-seperti. Semua penipisan, kompensasi, dan saluran penyaringan dilakukan dalam domain digital sesuai dengan MAX-PHY bagian digital definisi. Modus operasi radio sepenuhnya diprogram oleh antarmuka serial 3-kawat.

The MAX2548 is specified for operation in the extended -40°C to +85°C temperature range and is available in a 7mm x 7mm x 1.4mm fcLGA package with exposed paddle (EP).

MAX2548: Typical Operating CircuitEnlarge+

Key Features

• Complete RF In to Digital Bits Out Radio Receiver Subsystem
• Supports 1x (3.84Mcps) and 2x (7.68Mcps) TDD-WCDMA Operation in the Following Bands:
  • 915MHz to 921MHz
  • 1900MHz to 1920MHz
  • 2010MHz to 2025MHz
  • 2050MHz to 2082MHz
• MAX-PHY Digital Rx Interface with Single-Bit I and Q Bitstreams
• Complete Two-Chip TDD-WCDMA Solution with MAX2598 Transmitter
• High Dynamic Range Sigma-Delta ADCs Allow Simple AGC Implementation with Switched Gain States
• On-Chip Fractional-N Frequency Synthesizers for LO and Sampling Clock Generation
• Dual Buffered Reference Outputs to Drive Transmit IC and Baseband/DSP
• Operation Controlled Entirely by 3-Wire Serial Interface; No Analog Control Signals Necessary
•  MAX2548 yang ditentukan untuk operasi di ° C hingga + 85 ° C rentang temperatur diperpanjang -40 dan tersedia dalam 7mm x 7mm x 1.4mm paket fcLGA dengan paddle terkena (EP) .MAX2548: Khas Operasi CircuitMAX2548: Khas Operasi CircuitEnlarge +

  Fitur utama
  Lengkap RF Dalam untuk Digital Bits Out Radio Receiver Subsystem
  Mendukung 1x (3.84Mcps) dan 2x (7.68Mcps) TDD-WCDMA Operasi di Band Mengikuti:
  915MHz ke 921MHz
  1900MHz untuk 1920MHz
  2010MHz untuk 2025MHz
  2050MHz untuk 2082MHz
  MAX-PHY Digital Rx Interface dengan Single-Bit I dan Q Bitstreams
  Lengkap Dua-Chip TDD-WCDMA Solusi dengan MAX2598 Transmitter
  Tinggi Dynamic Range Sigma-Delta ADC Izinkan Pelaksanaan AGC Sederhana dengan Switched Gain Serikat
  On-Chip pecahan-N Synthesizers Frekuensi untuk LO dan Sampling Jam Generasi
  Ganda Buffered Referensi Output ke Drive Transmit IC dan Baseband / DSP
  Operasi Dikendalikan Sepenuhnya oleh 3-Wire Serial Interface; Tidak ada Kontrol Analog Sinyal Diperlukan

• diposting 21-01-2017

Applications/Uses

• TDD-WCDMA Handsets and Data Cards
• TD TV Receivers